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Hey there, I'm Subbu.

Over the last 15+ years I've worked on all aspects of ASIC/SoC development including RTL Design, Functional Verification with UVM, Formal Verification, Performance Modeling and Lab Validation.

Why you should subscribe?

Every month you will receive an email which will provide value by

  1. Explaining important concepts in Computer Architecture, RTL Design and Verification with well thought out examples
  2. Saving you time by providing summaries of interesting papers and a collection of learning resources
  3. Leveling up your knowledge a little bit with every email

I started this website because almost every topic in Hardware Engineering is getting increasingly complex. The information available publicly often lacked the necessary depth and explanation I required to meaningfully apply it to my work.

Also, it's fun to be good at your job. This happens by deeply understanding the work your are doing, studying the work of others and developing an intuition through an understanding of history.

Who is this for?

This newsletter is for anyone who works on some aspect of SoC/ASIC development - SoC Architects, RTL Designers, DV, Emulation and Validation Engineers.

This is especially for you if

  • You work in a small team where you have to wear multiple hats through the life of a project (i.e, Designers who also have to some DV; DV folks who also have to do Formal and write some Software/Firmware.)
  • You are ambitious and you want to widen the breadth of your Hardware Engineering knowledge.
  • You care about rigorous thinking, quality of your code, and setting a high bar.
  • You are a students who finds their course material insufficient and want to get a taste of real world engineering.

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